Let's Control It

First of all, there was a very small problem calculating CPU-load, which I fixed a few days ago. That build can be found here: https://td-er.nl/ESPEasy/latest/ The problem was that I didn't count the idle time which may have been started right before the CPU load was calculated. But that's at most 1 or 2 percentage-points difference on nodes which have a relatively high load. So the difference here between the 'normal' and the 'collection' or 'display' builds is likely the extra debug code and features disabled by the 'LIMIT_BUILD_SIZE' flag that's present in the 'normal' builds (and 'max' builds), but not in the other builds. So even if you have debug log level disabled, the extra code requires extra loading of code from the flash to execute. On the ESP32-S3 with PSRAM, this difference is probably smaller, as that one does have a larger code cache and faster access to the program code.

First of all, there was a very small problem calculating CPU-load, which I fixed a few days ago. That build can be found here: https://td-er.nl/ESPEasy/latest/ The problem was that I didn't count the idle time which may have been started right before the CPU load was calculated. But that's at most 1 or 2 percentage-points difference on nodes which have a relatively high load. So the difference here between the 'normal' and the 'collection' or 'display' builds is likely the extra debug code and features disabled by the 'LIMIT_BUILD_SIZE' flag that's present in the 'normal' builds (and 'max' builds), but not in the other builds. So even if you have debug log level disabled, the extra code requires extra loading of code from the flash to execute. On the ESP32-S3 with PSRAM, this difference is probably smaller, as that one does have a larger code cache and faster access to the program code.

First of all, there was a very small problem calculating CPU-load, which I fixed a few days ago. That build can be found here: https://td-er.nl/ESPEasy/latest/ The problem was that I didn't count the idle time which may have been started right before the CPU load was calculated. But that's at most 1 or 2 percentage-points difference on nodes which have a relatively high load. So the difference here between the 'normal' and the 'collection' or 'display' builds is likely the extra debug code and features disabled by the 'LIMIT_BUILD_SIZE' flag that's present in the 'normal' builds (and 'max' builds), but not in the other builds. So even if you have debug log level disabled, the extra code requires extra loading of code from the flash to execute. On the ESP32-S3 with PSRAM, this difference is probably smaller, as that one does have a larger code cache and faster access to the program code.

First of all, there was a very small problem calculating CPU-load, which I fixed a few days ago. That build can be found here: https://td-er.nl/ESPEasy/latest/ The problem was that I didn't count the idle time which may have been started right before the CPU load was calculated. But that's at most 1 or 2 percentage-points difference on nodes which have a relatively high load. So the difference here between the 'normal' and the 'collection' or 'display' builds is likely the extra debug code and features disabled by the 'LIMIT_BUILD_SIZE' flag that's present in the 'normal' builds (and 'max' builds), but not in the other builds. So even if you have debug log level disabled, the extra code requires extra loading of code from the flash to execute. On the ESP32-S3 with PSRAM, this difference is probably smaller, as that one does have a larger code cache and faster access to the program code.

First of all, there was a very small problem calculating CPU-load, which I fixed a few days ago. That build can be found here: https://td-er.nl/ESPEasy/latest/ The problem was that I didn't count the idle time which may have been started right before the CPU load was calculated. But that's at most 1 or 2 percentage-points difference on nodes which have a relatively high load. So the difference here between the 'normal' and the 'collection' or 'display' builds is likely the extra debug code and features disabled by the 'LIMIT_BUILD_SIZE' flag that's present in the 'normal' builds (and 'max' builds), but not in the other builds. So even if you have debug log level disabled, the extra code requires extra loading of code from the flash to execute. On the ESP32-S3 with PSRAM, this difference is probably smaller, as that one does have a larger code cache and faster access to the program code.

First of all, there was a very small problem calculating CPU-load, which I fixed a few days ago. That build can be found here: https://td-er.nl/ESPEasy/latest/ The problem was that I didn't count the idle time which may have been started right before the CPU load was calculated. But that's at most 1 or 2 percentage-points difference on nodes which have a relatively high load. So the difference here between the 'normal' and the 'collection' or 'display' builds is likely the extra debug code and features disabled by the 'LIMIT_BUILD_SIZE' flag that's present in the 'normal' builds (and 'max' builds), but not in the other builds. So even if you have debug log level disabled, the extra code requires extra loading of code from the flash to execute. On the ESP32-S3 with PSRAM, this difference is probably smaller, as that one does have a larger code cache and faster access to the program code.

First of all, there was a very small problem calculating CPU-load, which I fixed a few days ago. That build can be found here: https://td-er.nl/ESPEasy/latest/ The problem was that I didn't count the idle time which may have been started right before the CPU load was calculated. But that's at most 1 or 2 percentage-points difference on nodes which have a relatively high load. So the difference here between the 'normal' and the 'collection' or 'display' builds is likely the extra debug code and features disabled by the 'LIMIT_BUILD_SIZE' flag that's present in the 'normal' builds (and 'max' builds), but not in the other builds. So even if you have debug log level disabled, the extra code requires extra loading of code from the flash to execute. On the ESP32-S3 with PSRAM, this difference is probably smaller, as that one does have a larger code cache and faster access to the program code.

First of all, there was a very small problem calculating CPU-load, which I fixed a few days ago. That build can be found here: https://td-er.nl/ESPEasy/latest/ The problem was that I didn't count the idle time which may have been started right before the CPU load was calculated. But that's at most 1 or 2 percentage-points difference on nodes which have a relatively high load. So the difference here between the 'normal' and the 'collection' or 'display' builds is likely the extra debug code and features disabled by the 'LIMIT_BUILD_SIZE' flag that's present in the 'normal' builds (and 'max' builds), but not in the other builds. So even if you have debug log level disabled, the extra code requires extra loading of code from the flash to execute. On the ESP32-S3 with PSRAM, this difference is probably smaller, as that one does have a larger code cache and faster access to the program code.

First of all, there was a very small problem calculating CPU-load, which I fixed a few days ago. That build can be found here: https://td-er.nl/ESPEasy/latest/ The problem was that I didn't count the idle time which may have been started right before the CPU load was calculated. But that's at most 1 or 2 percentage-points difference on nodes which have a relatively high load. So the difference here between the 'normal' and the 'collection' or 'display' builds is likely the extra debug code and features disabled by the 'LIMIT_BUILD_SIZE' flag that's present in the 'normal' builds (and 'max' builds), but not in the other builds. So even if you have debug log level disabled, the extra code requires extra loading of code from the flash to execute. On the ESP32-S3 with PSRAM, this difference is probably smaller, as that one does have a larger code cache and faster access to the program code.

First of all, there was a very small problem calculating CPU-load, which I fixed a few days ago. That build can be found here: https://td-er.nl/ESPEasy/latest/ The problem was that I didn't count the idle time which may have been started right before the CPU load was calculated. But that's at most 1 or 2 percentage-points difference on nodes which have a relatively high load. So the difference here between the 'normal' and the 'collection' or 'display' builds is likely the extra debug code and features disabled by the 'LIMIT_BUILD_SIZE' flag that's present in the 'normal' builds (and 'max' builds), but not in the other builds. So even if you have debug log level disabled, the extra code requires extra loading of code from the flash to execute. On the ESP32-S3 with PSRAM, this difference is probably smaller, as that one does have a larger code cache and faster access to the program code.

First of all, there was a very small problem calculating CPU-load, which I fixed a few days ago. That build can be found here: https://td-er.nl/ESPEasy/latest/ The problem was that I didn't count the idle time which may have been started right before the CPU load was calculated. But that's at most 1 or 2 percentage-points difference on nodes which have a relatively high load. So the difference here between the 'normal' and the 'collection' or 'display' builds is likely the extra debug code and features disabled by the 'LIMIT_BUILD_SIZE' flag that's present in the 'normal' builds (and 'max' builds), but not in the other builds. So even if you have debug log level disabled, the extra code requires extra loading of code from the flash to execute. On the ESP32-S3 with PSRAM, this difference is probably smaller, as that one does have a larger code cache and faster access to the program code.

What is the difference ESP_Easy_mega_20260720_normal_ESP32_4M316k to ESP_Easy_mega_20260720_display_B_ESP32_4M316k Unit using ESP_Easy_mega_20260720_normal_ESP32_4M316k sysload 15 % flashing ESP_Easy_mega_20260720_display_B_ESP32_4M316k sysload 7 % nothing else changed on this unit only one device active Environment - DS18xxx/MAX31xxx/1-Wire Temperature - 2 DS18B20 - Interval 300 sec Controller PiDome MQTT, FHEM HTTP, ESPEasy P2P Networking Network Ethernet (RMII) 100 Mbps, WiFi AP Fallback Interface - not active Code: MemoryHeap Size:328800 [B]Heap Min Free:225704 [B]Free RAM:232464 [B]Heap Max Free Block:110592 [B]Free Stack:6532 [B]ESP BoardESP Chip ID:0x289A3CESP Chip Frequency:240 [MHz]ESP Crystal Frequency:40 [MHz]ESP APB Frequency:80 [MHz]ESP Chip Model:ESP32-D0WDQ5ESP Chip Revision:1.00ESP Chip Cores:2ESP Board Name:Espressif Generic ESP32 4M Flash ESPEasy 1810k Code/OTA 316k FSESP Chip Features:Wi-Fi bgn / BLEStorageFlash Chip ID:0x16405EFlash Chip Vendor:0x5EFlash Chip Model:0x4016Flash Chip Real Size:4096 [kB]Flash IDE Size:4096 [kB]Flash Chip Speed:80 [MHz]Flash IDE Speed:80 [MHz]Flash IDE Mode:DIOFlash Writes:5 daily / 6 cold bootSketch Size:1792 [kB] (64 kB not used)Max. OTA Sketch Size:1856 [kB] (1900544 bytes)Little FS Size:316 [kB]Little FS Free:148 [kB]Page size:256 [B]Block size:8192 [B]Number of blocks:39